Tata ELXSI

Career Details
Eligibility:

Engineering Degree with 60%

Selection Process:

Written
GD
Interview

Entry Package:
2.1
Organization Details
Industry:
IT/Software, Hardware
Company Profile :

Seamlessly integrating precision and ingenuity, Tata Elxsi's abilities stem from our creative leadership in hard-core technology and strength in design. Augmenting these capabilities is our expertise across our practice areas to provide point services and end-to-end solutions across the product lifecycle.

From Automotive to Aerospace, Enterprise to Consumer Electronics, Entertainment to FMCG, Media to Storage, Semicon to Telecom, we provide customized design solutions to companies across the globe. We ensure cost-effective, time-to-market solutions through a highly motivated skilled workforce driven by strong design principles, highest levels of quality and ethical business practices.

Touching people's lives in myriad ways, Tata Elxsi's solutions can impact directly or subtly, leaving a mark of excellence in its wake.

Value Statement:

Engineering creativity with the best of breed technology, Tata Elxsi will strive to deliver solutions high on innovation, all the time conscious of quality, time and cost and most of all designed according to your needs.

1 written test.
2 technical interview.
3 hr interview.

it was off campus here at ddu nadiad and it was for computer , EC and electronics...on first day there were written test . in that there were 4 section and there was NO Negative marking and about 50% Sectional cutoff

in written test,
1,English section 20 questions and 20 min.
it was easy means if you know basics of articals then no need to worry.

2,Aptitude section 20 q. and 25min.
it was of simple calculations , cube problems , and 5 logical reasoning it was mediam

3,Calculation section 25 q. and 25 min.
it was simplest q. like @=0 and $=1 and then covert 25 into binary and represent it with this symbols
then 1233465 1233465 1233466 find out odd one .
So it was very easy...........

4,technical section 30 q. and 30 min.
In this there were separate papers for CS AND EC. i am from CS so in this there were q. from c ,c++ ,networking ,few from operating system,and many from data structures.. so be well prepare for data structures and networking .....

they declared result at 4:30 and the technical interview of about 30 students was on that day itself. while for other 35 it was on next day morning.....

IN TECHNICAL
only one member was there on starting he told me to give resume
then told me to list out subjects i studied ..
then he asked many q. from networking means what are uses of networking?
what is subnet ? about class of ip address...
then asked from c and c++ means diff. between structure and union ?
from array and linked list ....some from pointers ...
and at last he asked from opetrating sys. but i told him about my project so he didnt asked much from os.
and finally one mem told me that you are selected for HR round and you have to be present on tom. morning 9 .

HR interview
Mostly they dont discard people from this round because the technical was very tuff so be confident and tell any thing means wheather it is true or false .IN my intreview there was one mem who asked me in a very good way that i was very relax
she asked discribe your self...
About your family...
stenghths and weakness ..
in this tell some weakness and also tell how you are improving it ..
about tata elxsi..
some about aims ....

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Tata Elxsi Questions Problem

Tata Elxsi Questions
Problem on lissojous pattern: in x-y mode if vlg applied to x-axis is 2 sinwt then what is the vtg to be applied to y-axis so that we observe the following pattern on the cro : [angle b/n x-axis and the diagonal line is 45degrees] ans is 2root 2 sin (wt +45)

What is the resolution of an adc : vref/(2 pow n).

Some circuit is given with two f/f s ,what is that circuit? Ans may be shift reg

Spatial to temporal converter is ? (a) shift reg ( b) counter (c ) adc ans may be adc

Darlington is used for _____ ans high current gain

Some circuit with nand gates is given ,what is that circuit ans is xor

A wired circuit with some nand gates is given asked the function of that circuit

An opamp circuit is given asked to find the transfer function of it ( I think its an ideal integrator circuit)

A pole zero pattern of an impedance function is given . it has a conjugate pair of zeros and a conjugate pair of poles ,then what elements does the impedance consists of? Ans LC elements

Most computers wont use floating point arithmetic .why a.costly b. slow c. cant

Bit-slice processor mean …… ans used for shift ,masking of bits

ac motor used in servo applications is (a) single phase induction b.2 phase induction c. 3 phase induction

TV resolution depends on a. bandwidth 2. detector c. no. of frames /sec

Equalizing pulses are sent in tv during a. horizontal blanking b. vertical blanking ……….

cdma is not suitable for satellite communication . why ? ans may be complexity of operation

Given some waveforms and asked that which of the waveforms will have odd harmonics of sine terms

Asked for two’s complement of a number

maximum signed no. represented by a 8 bit computer

A chip has a capacity of 256bits,to implement a 1KB capacity how many chips are required ans 32

ecl operates in ____ and ____ regions of the transistor

Given a transient circuit ,asked for time constant while charging and discharging

He had given 4 statements about a f/f and asked which of them are correct
1. it can store a bit 2. jk f/f have rat race when storing a 2 bit info 3. master slave is used to store a 2 bit info
4. d f/f used as a latch for multiplexing operations

Venn diagram is given and asked to write expression for the shared portion in it

cb and ce are ____ biased when transistor is in saturation

condition for nyquist rate

carry look ahed adder is 1.fast 2. requires more h/w 3. costly

ideal power supply will have a. zero internal resistance b. more o/p resistance c. less o/p resistance

A problem on cro and probe interface i.e design of an attenuator for the cro probe (formula for it is R1 * c1 = R2 * C2 )

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